Advanced silicon bipolar, CMOS or BiCMOS circuits are used today for high-speed applications in the 1–5 GHz frequency range, replacing circuits previously only possible to realize using III–V based technologies.
A common trend in microelectronics is to integrate more and more functions on a single chip, in order to increase the general performance of the circuits and to reduce size, power consumption and price of the system.
High-performance bipolar integrated circuits have been used extensively for critical building blocks in telecommunication circuits, mainly for the analog functions, e.g. for switching currents and voltages, and for the high-frequency radio circuit functions (mixers, amplifiers, detector etc.). The versatility of a BiCMOS-process is many times preferred, although it is not suited for all applications. For high-performance cost-effective circuits, such as would be used in a cellular telephone, a bipolar-only process is many times still to prefer.
Voltage-controlled oscillators (VCO), typically used in phase-locked loops (PLL), are important building blocks in many high-frequency telecommunication applications. VCO: s are often realized as LC-sinusoidal oscillators due to a higher quality factor of the tank circuit, and therefore better phase noise performance. The resonant frequency fr for a LC-resonant circuit is given by:
                              f          r                =                  1                      2            ⁢                                                  ⁢            π            ⁢                                          L                ⁢                                                                  ⁢                C                                                                        (        1        )            
By using a varactor, the resonant frequency can be varied by adjusting the voltage V over the capacitor.
A varactor can be realized by using the depletion capacitance characteristics of a p/n-junction, which is available in any semiconductor process. Alternatively, a varactor may be realized using an MOS-transistor, which is only available in CMOS or BiCMOS processes.
Due to the relationship between voltage and capacitance of the particular varactor, the voltage-frequency relationship of the VCO will have different non-linear characteristics. If the varactor characteristics could be tuned so that this relationship would become linear, it would be advantageous for circuit design.
One advantage is when the VCO is used in a PLL with changeable dividing ratio. If a linear relationship exists between the tuning voltage and the resonant frequency, the loop gain and therefore the characteristics of the PLL will be less dependent of the dividing ratio.
A second advantage is when noise is added to the tuning voltage, this noise will be converted to phase noise of the VCO due to the voltage-to-frequency nature of the varactor. If for a given tuning range, linear characteristics can be obtained, the phase noise will be constant over the whole tuning range. This also means than noise minimization over the interval will be easier to do when the noise is constant.
The diode varactor is easiest to use for such tuning by varying the doping profile, while the MOS varactor characteristics cannot be manipulated extensively.
Two types of capacitance are associated with a junction: depletion capacitance and diffusion capacitance. A diode-based varactor is operated in the reverse-bias mode, and in this mode the depletion capacitance is dominant. As the magnitude of the reverse bias applied to the junction increases, the field in the depletion region becomes larger and the majority carriers are pulled back further from the junction. The junction will act similar to a parallel-plate capacitor, but with variable “plate distance”. The relationship between the stored charge in the depletion region (the capacitance) and the applied voltage will not in general be linear, but vary depending on the doping profile in the depletion region.
The nonlinear depletion capacitance can be expressed by the following equation:
                              C          j                =                                                      ⅆ              Q                                      ⅆ                              V                D                                                                                  (        2        )            in which dQ is the differential of the charge stored in one side of the depletion region. dVD is the differential voltage and Cj is the capacitance of the diode. The junction capacitance can also computed via the one-dimensional capacitor formula:
                              C          ⁢                                          ⁢          j                =                  ɛ          W                                    (        3        )            where W is the width of the depletion region. The expression for a one-sided abrupt junction, which is very common in integrated circuits, is given by:
                    W        =                              [                                                            2                  ⁢                                                                          ⁢                                      ɛ                    ⁡                                          (                                              V                        -                                                  V                                                      b                            ⁢                                                                                                                  ⁢                            i                                                                                              )                                                                      q                            ⁢                              (                                                                            N                      a                                        +                                          N                      d                                                                                                  N                      a                                        ⁢                                          N                      d                                                                      )                                      ]                                1            /            2                                              (        4        )            where V is the applied reverse voltage applied to the p/n-junction, Vbi the built-in voltage of the junction, and Na and Nd are the acceptor and donator doping concentrations of the depletion region.
To estimate the incremental capacitance of a varactor diode, the following equation can be used, where the capacitance-voltage relationship is approximated:
                              C          j                =                              C                          j              ⁢                                                          ⁢              o                                                          [                              1                -                                  (                                                            V                      D                                                              V                                              b                        ⁢                                                                                                  ⁢                        i                                                                              )                                            ]                        n                                              (        5        )            where Cjo is the incremental depletion capacitance for zero bias, n is the grading coefficient, VD is the operating-point voltage and Vbi is the built-in barrier potential. Formula (5) is extensively used in circuit simulations for basic junction capacitance modeling.
The grading coefficient refers to the way in which the doping levels change with distance across the junction. If the junction is abrupt, n=½, the doping levels change abruptly at the junction but are constant throughout each side. For a linearly graded junction, n=⅓, the doping levels change linearly with distance.
An important characteristic of a varactor is its capacitance-tuning ratio, defined as the capacitance at low voltage bias (e.g. close to 0 V) divided by the capacitance at higher voltage bias (e.g. close to Vcc). Typical realistic values of tuning range, using Vlow=0.5 V and Vhigh=2.5 V, is 1.5–2.0.
The zero bias depletion capacitance Cjo is approximately proportional to the area of the junction and the doping level (highly doped junction give high capacitance).
Although any diode can act as a varactor, it is often necessary to design a special varactor to fulfill the requirements of a fully integrated VCO.
A review of details regarding varactors is given by M. H. Norwood and E. Shatz in “Voltage Variable Capacitor Tuning: A Review”, Proc. IEEE, Vol. 56, No. 5, p. 788, 1968.
In U.S. Pat. No. 5,405,790 is described how to integrate a varactor in a BiCMOS process. An N well of a varactor region is formed in an epitaxial layer by doping the epitaxial layer with an N type dopant. A cathode region is formed in the N well by further doping the N well with the N type dopant. Cathode electrodes are formed by patterning a layer of polysilicon over the epitaxial layer. Subsequently, the cathode electrodes are doped with an N type dopant. A region adjacent the cathode region is doped to form a lightly doped region. The lightly doped region is doped with a P type dopant to form an anode region.
In U.S. Pat. No. 5,477,197 is described how an undesirable relationship between user applied input frequency control voltage and output frequency of a voltage controlled oscillator is counteracted by controlling the characteristics of an amplifier stage in the oscillator as a function of frequency control signal in addition to controlling the output frequency of the oscillator as a function of the capacitance of a user controlled variable capacitance in response to the frequency control signal.